A Model for Univariant and Multivariant Simulating the Battery Lifetime of UE NB-IoT

NB-IoT represents a promising technology for facil-itating machine-to-machine communication within cellular IoT. The battery life of user equipment (UE NB-IoT) stands as a criti-cal parameter for ensuring the sustained and dependable opera-tion of NB-IoT applications over time.

Модель оценки времени автономной работы пользовательского устройства узкополосного интернета вещей

В работе предложена модель оценки энергопотребления и времени автономной работы пользовательского устройства узкополосного Интернета вещей (UE NB-IoT?User Equipment NB-IoT).

An effect of binarization on handwritten digits recognition by hierarchical neural networks

An In-Pandemic View on the Global Trends in Microelectronic Design and Market

Microelectronics is one of the drivers of the world economy. The global pandemic (Covid-19) has negatively influenced on mostly all industries and sectors of the world economy, including microelectronics. Some results of such influence on microelectronics and short-term trends already can be estimat

An Application of Machine Learning Methods: Electronic Design Automation Case Study

The fourth industrial revolution is based on active deployment of digital technologies at all sectors of economy world-wide. The state-of-the-art tech-nologies as the Internet of Things, Blockchain, High-Performance Computing, Cloud and Distributed Systems for data storage and processing,Big Data...

An Accuracy Improvement of the Neuromorphic Functional Models by Using the Parallel ANN Architecture

Enhancement of the up-to-date computing systems in performance and memory capacity stimulates development of new mathematical models and methods for numerical simulation. Machine learning methods are widely used nowadays in the electronic design automation. New mathematical entities are focused onto

Поиск рациональной структуры тестового генератора для подсистем встроенного самотестирования цифровых схем

В данной статье предложен способ поиска рациональной структуры тестового генератора, входящего в состав подсистем встроенного самотестирования цифровых схем. Решение направлено на минимизацию аппаратных и временных затрат и автоматизацию процесса формирования тестового генератора.

An Approach to Synthesis of the Neuromorphic Functional Models for Analog Components and Blocks

Numerical simulation of analog circuits and functional blocks (FB) is an important design stage of analog and mixed-signal integrated circuits as well as the state-of-the-art embedded systems. The application of adequate mathematical models for components and FB defines the quality of simulation and

Возможности математического моделирования и информационных технологий в подготовке специалистов для индустрии 4.0

Рассмотрены аспекты подготовки квалифицированных специалистов для Индустрии 4.0. Определены важные компетенции в области математической подготовки и освоении информационных технологий. Обозначены тренды рынка труда к переходу на новые профессии.

Hierarchical Convolutional Neural Network for Handwritten Digits Recognition

The International Symposium on Quality Electronic Design (ISQED)

Analog circuits are widely used in different fields such as medicine, military, aviation and are critical for the development of reliable electronic systems. Testing and diagnosis are important tasks which detect and localize defects in the circuit under test as well as improve quality of final prod

An Approach to Reducing Complexity of Neuromorphic Fault Dictionary Construction for Analogue Integrated Circuits

The paper is mainly focused on the reducing a complexity of fault dictionary constructing for analog integrated circuits based on neural network. The benefits of fault dictionary based on neural network (NN) such as associative operating mode and small influence of the number of considered faults...

ОПТИМИЗАЦИЯ ПОСТРОЕНИЯ НЕЙРОМОРФНОГО СПРАВОЧНИКА НЕИСПРАВНОСТЕЙ ДЛЯ ТЕСТИРОВАНИЯ И ДИАГНОСТИКИ АНАЛОГОВЫХ ИНТЕГРАЛЬНЫХ СХЕМ

Рассмотрены вопросам снижения сложности построения справочников неисправностей для аналоговых интегральных схем на основе искусственной нейронной сети (НС). Представлены преимущества нейроморфных справочников неисправностей (НСН): ассоциативный режим работы и слабое влияние количества рассматриваем

Опыт Казанского федерального университета в реализации магистерских программ двойных дипломов в сфере IT и компьютерных наук

Представлен опыт реализации Институтом вычислительной математики и информационных технологий КФУ магистерских программ двойных дипломов "Открытая информатика" с Чешским техническим университетом в Праге и "Data Science" с Шэньчжэньским университетом (Китай).

Entropy-Based Method of Reducing the Training Set Dimension at Constructing a Neuromorphic Fault Dictionary for Analog and Mixed-Signal ICs

The effect of faults on the circuit operating is usually evaluated by simulation, using the appropriate models of catastrophic and parametric faults. Functional and structural complexity, consideration of the tolerances on the components parameters, the infinity of the set of parametric faults, etc.

A Model of LoRaWAN Communication in Class A for Design Automation of Wireless Sensor Networks Based on the IoT Paradigm

Wireless sensor networks (WSN) organized according to the IoT paradigm become more and more claimed in different sectors of economy. Power consumption and time of autonomous operating for wireless sensors are the key factors at designing reliable and sustainable systems.

Technique for teaching parallel programming based on solving computational electrodynamics problems

Three-dimensional problems of computational electrodynamics for the regions of complex shape can be solved for the reasonable time only using multiprocessor computer systems. The paper discusses the process of converting sequential algorithms into more efficient programs.

Метод снижения размерности обучающих наборов при построении нейроморфного справочника неисправностей для аналоговых интегральных схем

В статье предложен метод, основанный на вычислении энтропии, для выбора существенных характеристик обучающего набора, разработан соответствующий алгоритм. Представлены результаты экспериментальных исследований для аналогового фильтра, которые демонстрируют высокую эффективность предлагаемого метода.

FPGA implementation of LTE turbo decoder using MAX-log MAP algorithm

Implementation of an efficient turbo decoder with low complexity, short delay and insignificant performance degradation is currently a quite challenging task. The paper presents an implementation of a 3GPP TS 36.212 LTE turbo decoder. The design of the turbo decoder has been optimized.

The State-of-the-art Trends in Education Strategy for Sustainable Development of the High Performance Computing Ecosystem

High-performance computing (HPC) plays very important role in the sphere of information technology as well as defines the strategic direction for inter- and trans-disciplinary breakthroughs ensuring the essential influence on local and global markets. The current status of HPC systems development in

Test Program Generation for Mixed-Signal Integrated Circuits Based on Automata Network

Testing and diagnosis of mixed-signal integrated circuits are very important and complex tasks, which require selection the most relevant test methods for analog and digital subcircuits and subsequent their matching for comprehensive testing of a circuit on the whole. Two basic models for des­cr

Автоматизация тестопригодного проектирования аналоговых и смешанных интегральных схем

The proposed tutorial will focus on design-for-testability automation issues. An efficient realization of test method selection for mixed-signal circuits is based on automation of all DFT stages for both digital and analog subcircuits. The following four key processes of design-for-testability autom

An Approach to Design-for-Testability Automation of Analogue Integrated Circuits Using OBIST Strategy

The paper is mainly focused on the task of design-for-testability (DFT) automation with emphasis on OBIST strategy for analog integrated circuits. The design procedures according to DFT flow are proposed. Three possible structural solutions for reconfiguration into oscillator are considered.

Test program generation for mixed-signal inte-grated circuits based on automata network