KFU. Card publication. FPGA implementation of LTE turbo decoder using MAX-log MAP algorithm

KAZAN
FEDERAL UNIVERSITY

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FPGA IMPLEMENTATION OF LTE TURBO DECODER USING MAX-LOG MAP ALGORITHM

Form of presentation

Articles in international journals and collections

Year of publication

2017

Язык

английский

Authors, employees of KFU

Mosin Sergey Gennadevich, author

Bibliographic description in the original language

Belov V, Mosin S., FPGA implementation of LTE turbo decoder using MAX-log MAP algorithm//2017 6th Mediterranean Conference on Embedded Computing, MECO 2017 - Including ECYPS 2017, Proceedings. - 2017. - Vol., Is.. - Art. № 7977157.

Annotation

Implementation of an efficient turbo decoder with low complexity, short delay and insignificant performance degradation is currently a quite challenging task. The paper presents an implementation of a 3GPP LTE turbo decoder. The design of the turbo decoder has been optimized to achieve efficient FPGA resource utilization. This design can be useful for applications, which is critical to resource utilizations, but do not need high throughput.

Keywords

Turbo decoder; BCJR; MAP; MAX-log MAP; LTE turbo decoder; FPGA implementation

The name of the journal

2017 6th Mediterranean Conference on Embedded Computing, MECO 2017 - Including ECYPS 2017, Proceedings

URL

https://www.scopus.com/inward/record.uri?eid=2-s2.0-85027076676&doi=10.1109%2fMECO.2017.7977157&partnerID=40&md5=354770324bf4c348859b14cb04929959

Please use this ID to quote from or refer to the card

https://repository.kpfu.ru/eng/?p_id=165137&p_lang=2

Full metadata record

Field DC	Value	Language
dc.contributor.author	Mosin Sergey Gennadevich	ru_RU
dc.date.accessioned	2017-01-01T00:00:00Z	ru_RU
dc.date.available	2017-01-01T00:00:00Z	ru_RU
dc.date.issued	2017	ru_RU
dc.identifier.citation	Belov V, Mosin S., FPGA implementation of LTE turbo decoder using MAX-log MAP algorithm//2017 6th Mediterranean Conference on Embedded Computing, MECO 2017 - Including ECYPS 2017, Proceedings. - 2017. - Vol., Is.. - Art. № 7977157.	ru_RU
dc.identifier.uri	https://repository.kpfu.ru/eng/?p_id=165137&p_lang=2	ru_RU
dc.description.abstract	2017 6th Mediterranean Conference on Embedded Computing, MECO 2017 - Including ECYPS 2017, Proceedings	ru_RU
dc.description.abstract	Implementation of an efficient turbo decoder with low complexity, short delay and insignificant performance degradation is currently a quite challenging task. The paper presents an implementation of a 3GPP LTE turbo decoder. The design of the turbo decoder has been optimized to achieve efficient FPGA resource utilization. This design can be useful for applications, which is critical to resource utilizations, but do not need high throughput.	ru_RU
dc.language.iso	ru	ru_RU
dc.subject		ru_RU
dc.title	FPGA implementation of LTE turbo decoder using MAX-log MAP algorithm	ru_RU
dc.type	Articles in international journals and collections	ru_RU